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2. Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower   of the voltages on the two (A or B Ports). 3. Parameter is characterized but not tested in production. 4. DRON = RON max − RON min measured at identical VCC, temperature and voltage levels. 5. Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions. 6. Guaranteed by Design. 7. This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On   Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance).
16-Bit Monotonic Over Temperature Relative Accuracy: 8 LSB (Max) Glitch Energy: 0.1 nV-s Settling Time: 10 µs to 0.003% FSR Power Supply: +2.7 V to +5.5 V MicroPower Operation: 200 µA at 5 V Rail-to-Rail Output Amplifier Power-On Reset to Zero Power-Down Capability Schmitt-Triggered Digital Inputs SYNC Interrupt Facility Drop-In Compatible With DAC8531/01 Operating Temperature Range: -40C to 105C Available Package: C 3 mm 5 mm MSOP-8
  The Z0020CE device is a spin−off of our popular SOT−23/SOT−323 three−leaded device. It is designed for general purpose amplifier applications and is housed in the SOT−363−6 surface mount package. By putting two discrete devices in one package, this device is ideal for low−power surface mount applications where board space is at a premium.
Parr number/PDF Mfg Pack D/C Descrpion
Z0003052/24604-3   Z0003052/24604-3 Z0003052/24604-3 PDF Download Note 8: Skew is defined as the absolute value of
Z0020CE   Z0020CE Z0020CE PDF Download 96+ The clock signal connected to this pin is used t
Z0040CE   Z0040CE Z0040CE PDF Download
Z0054877   Z0054877 Z0054877 PDF Download IMPORTANT NOTE: The Virtex-II Platform FPGA data
Z00607   Z00607 Z00607 PDF Download ST 06+ 4000 accuracy on the transmitted signal frequency Str
Z00607DA   Z00607DA Z00607DA PDF Download Soldering/Cleaning Cleaning agents from the ket
Z00607DA1BA2   Z00607DA1BA2 Z00607DA1BA2 PDF Download The RESET/OE and CE pins control the tri-state bu
Z00607MA   Z00607MA Z00607MA PDF Download ST TO-92 07+ The SDA is a Bi-directional pin used to transfer
Z00607MA1   Z00607MA1 Z00607MA1 PDF Download Arbitrary trigger levels for receiver and transm
Z00607MA1BA   Z00607MA1BA Z00607MA1BA PDF Download Stresses above those listed under Absolute Maxim
Z00607MA1BA2   Z00607MA1BA2 Z00607MA1BA2 PDF Download ST TO-92 Data is shifted in on the rising edge of the SI
Z00607MA1-BA2(E)   Z00607MA1-BA2(E) Z00607MA1-BA2(E) PDF Download ST TO 92 07/08+ (see Reference 2 for derivation) where q is the
Z00607MA5BL2   Z00607MA5BL2 Z00607MA5BL2 PDF Download The three transmitter operating modes C transmit
Z00607MA-CN   Z00607MA-CN Z00607MA-CN PDF Download ST TO-92 07+ Clip mounting (on case), where lead does not ove
Z0072CE   Z0072CE Z0072CE PDF Download The advent of cheaper and more powerful personal
Z0072CE(HDK-J)   Z0072CE(HDK-J) Z0072CE(HDK-J) PDF Download SHARP ZIP 07+ 1. For DC outputs, especially those resulting fr
Z(51VZ)   Z(51VZ) Z(51VZ) PDF Download • Dual voltage monitoring   V2Mon ope
Z/400ML   Z/400ML Z/400ML PDF Download   MultiMediaCard (MMC) Form Factor   S
Z0.2W9.1V   Z0.2W9.1V Z0.2W9.1V PDF Download at 25C and 100C. Increasing the reverse bias wil
Z0003052/24604-3   Z0003052/24604-3 Z0003052/24604-3 PDF Download Note 8: Skew is defined as the absolute value of
Z0020CE   Z0020CE Z0020CE PDF Download 96+ The clock signal connected to this pin is used t
Z0040CE   Z0040CE Z0040CE PDF Download
Z0054877   Z0054877 Z0054877 PDF Download IMPORTANT NOTE: The Virtex-II Platform FPGA data
Z00607   Z00607 Z00607 PDF Download ST 06+ 4000 accuracy on the transmitted signal frequency Str
Z00607DA   Z00607DA Z00607DA PDF Download Soldering/Cleaning Cleaning agents from the ket
Z00607DA1BA2   Z00607DA1BA2 Z00607DA1BA2 PDF Download The RESET/OE and CE pins control the tri-state bu
Z00607MA   Z00607MA Z00607MA PDF Download ST TO-92 07+ The SDA is a Bi-directional pin used to transfer
Z00607MA1   Z00607MA1 Z00607MA1 PDF Download Arbitrary trigger levels for receiver and transm
Z00607MA1BA   Z00607MA1BA Z00607MA1BA PDF Download Stresses above those listed under Absolute Maxim
Z00607MA1BA2   Z00607MA1BA2 Z00607MA1BA2 PDF Download ST TO-92 Data is shifted in on the rising edge of the SI
Z00607MA1-BA2(E)   Z00607MA1-BA2(E) Z00607MA1-BA2(E) PDF Download ST TO 92 07/08+ (see Reference 2 for derivation) where q is the
Z00607MA5BL2   Z00607MA5BL2 Z00607MA5BL2 PDF Download The three transmitter operating modes C transmit
Z00607MA-CN   Z00607MA-CN Z00607MA-CN PDF Download ST TO-92 07+ Clip mounting (on case), where lead does not ove
Z0072CE   Z0072CE Z0072CE PDF Download The advent of cheaper and more powerful personal
Z0072CE(HDK-J)   Z0072CE(HDK-J) Z0072CE(HDK-J) PDF Download SHARP ZIP 07+ 1. For DC outputs, especially those resulting fr
Z0102   Z0102 Z0102 PDF Download ST TO-92 04+ The Z0102 is a single-supply, broadband modem, m
Z0102MA1AA2   Z0102MA1AA2 Z0102MA1AA2 PDF Download This is to advise Samsung customers that in accor
Z0102MN   Z0102MN Z0102MN PDF Download ST SOT-223 05+ The DS4077 is an integrated voltage-controlled cr
Z0103   Z0103 Z0103 PDF Download HAR TO92 2000 Stresses above the ratings listed below can caus
Z0103DA1AA2   Z0103DA1AA2 Z0103DA1AA2 PDF Download ER (error signal) is low when normal operation i
Z0103DN   Z0103DN Z0103DN PDF Download 06+ Chip Enable Input. If logic high, all functions a
Z0103DN5AA4   Z0103DN5AA4 Z0103DN5AA4 PDF Download ST 00+ 3-wire FSK Interface Data (CMOS Output). Mark fr
Z0103DN-5AA4   Z0103DN-5AA4 Z0103DN-5AA4 PDF Download ST TO-223 Agilents HSMS-286x family of DC biased detector
Z0103MA   Z0103MA Z0103MA PDF Download ST sgs dc02 Maximum ratings are those values beyond which de
Z0103MA116   Z0103MA116 Z0103MA116 PDF Download PHILIPS O7+ Data Inputs/Outputs: Inputs array data during pr
Z0103MA1AA2   Z0103MA1AA2 Z0103MA1AA2 PDF Download ST 06/07+ PARAMETER Reference Voltage Section Fb Voltage
Z0103MA2AL2   Z0103MA2AL2 Z0103MA2AL2 PDF Download Port 2 Port 2 is an 8-bit bidirectional I O port
Z0103MA412   Z0103MA412 Z0103MA412 PDF Download VCC and GND are the supply voltage pins for the
Z0103MA5AL2   Z0103MA5AL2 Z0103MA5AL2 PDF Download ST   Read the contents of the Data Register po
Z0103MN   Z0103MN Z0103MN PDF Download ST SOT-223 An active high input from an external circuit wh
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