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  functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not   implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltages are with respect to GND.
SERIAL DATA (SDA) SDA is a bidirection pin used to transfer data or security bit into and out of the device. It is an open drain output and may be wire-ORed with any number of open drain or open collector outputs. Thus, the SDA bus requires a pull-up resistor to Vcc (typical 4.7K£ [ for 100KHZ, 1K£ [ for 400KHZ)
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the L040 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Parr number/PDF Mfg Pack D/C Descrpion
L040   L040 L040 PDF Download The receiver would fail to acknowledge for two
L04-0107190-V02   L04-0107190-V02 L04-0107190-V02 PDF Download N/A   The motor is directly driven by IRF511 po
L04010D010-W18-1UH   L04010D010-W18-1UH L04010D010-W18-1UH PDF Download N/A CLKBs output originates from the cross point swit
L04-100B030-D04   L04-100B030-D04 L04-100B030-D04 PDF Download This pin is internally biased at the reference v
L04-1507020-T15   L04-1507020-T15 L04-1507020-T15 PDF Download N/A The voltage-controlled oscillator (VCO) receives
L04-15A7030-F08   L04-15A7030-F08 L04-15A7030-F08 PDF Download N/A The signal on the current sense input pin is als
L04-15R7050-F08   L04-15R7050-F08 L04-15R7050-F08 PDF Download N/A The internal burst counter is fiexd to 2-bit sequ
L041S153(D153)   L041S153(D153) L041S153(D153) PDF Download In-Circuit Serial Programming (ICSP™) Int
L04-22A7080-W18   L04-22A7080-W18 L04-22A7080-W18 PDF Download N/A The device is programmed on a word-by-word basis
L043   L043 L043 PDF Download PHILIPS QFN-S 6+ Max. UnitsConditions  VVGE = 0V, IC = 250&m
L04-33R7050-F08   L04-33R7050-F08 L04-33R7050-F08 PDF Download N/A Writing to the device is accomplished by taking
L043A   L043A L043A PDF Download PHILIPS QFN 03+ When reading the RTC data, it is recommended to
L043A223   L043A223 L043A223 PDF Download The ADSP-TS202S processor internal memory has 12
L043O   L043O L043O PDF Download VDD: Chip power supply pin. VDD should be bypasse
L043S104(E104)   L043S104(E104) L043S104(E104) PDF Download In simple mode all feedback paths of the output p
L04-47B7020-08   L04-47B7020-08 L04-47B7020-08 PDF Download N/A Maximum ratings are those values beyond which de
L044A260   L044A260 L044A260 PDF Download INTEL BGA 96 Configuration EPROMs for FLEX Devices Data Sheet
L045   L045 L045 PDF Download SOT-223, JC -------------------------------------
L045T98   L045T98 L045T98 PDF Download The Simultaneous Read/Write architecture provides
L046   L046 L046 PDF Download NEC BGA 07+/08+ • Support for low voltage interface to VGA
L048A646   L048A646 L048A646 PDF Download *Stresses above those listed under Absolute Maxi
L04B   L04B L04B PDF Download LP2981IM5X-3.3 National SOT23-5 is sampled at the reference frequency to give th
L.PI-1R2D13   L.PI-1R2D13 L.PI-1R2D13 PDF Download N/A • Industry Standard Size • Industr
L.PI-2R2D10   L.PI-2R2D10 L.PI-2R2D10 PDF Download N/A VDD to GNDC0.3 V to 7 V Analog Input Voltage to
L/03/07/T1.5   L/03/07/T1.5 L/03/07/T1.5 PDF Download   Junction-to-case thermal resistance is sp
L/03/07/T5.5   L/03/07/T5.5 L/03/07/T5.5 PDF Download 256 x 16-bit organization array (L/03/07/T5.5) 5
L/03/07/T6.5   L/03/07/T6.5 L/03/07/T6.5 PDF Download International Rectifier's L/03/07/T6.5 is a state
L/08/17/T2   L/08/17/T2 L/08/17/T2 PDF Download A Command User Interface (CUI) serves as the in
L/08/17/T3   L/08/17/T3 L/08/17/T3 PDF Download In a slow mode, the conversion is completed befo
L/3.3/08/T8   L/3.3/08/T8 L/3.3/08/T8 PDF Download Round Control. When this control is HIGH, a one
L0.381R5.A10   L0.381R5.A10 L0.381R5.A10 PDF Download In addition to parallel termination, SSTL-3 and
L0.CB020.B21   L0.CB020.B21 L0.CB020.B21 PDF Download A. These materials are intended as a reference t
L00005B   L00005B L00005B PDF Download NSC   Figure 2 shows another typical circuit. T
L00006B   L00006B L00006B PDF Download NSC QFN-16 The U6209B is controlled via a 2-wire I2C bus fo
L00008B   L00008B L00008B PDF Download NS LLP 02+ • These diodes are also available in other
L00014B   L00014B L00014B PDF Download NSC Electrical characteristics are guaranteed over f
L00017B   L00017B L00017B PDF Download NSC Both circuits have three binary select inputs (A
L00018B   L00018B L00018B PDF Download NSC   These N-Channel power MOSFETs   ar
L00019B   L00019B L00019B PDF Download NSC RTS = 0 V, VDD1 = 5.5 V 2 Mbps, VDD1 = 5.5 V, se
L00041B   L00041B L00041B PDF Download NS QFN 04+ The oscillator determines the frequency of the o
L00053B   L00053B L00053B PDF Download NS QFN-16 05+ The ISSI IS41C4100 and IS41LV4100 are 1,048,576
L0005B   L0005B L0005B PDF Download NATIONAL BGA 03+ Hynix HYMD264G726A(L)8-M/K/H/L series is designed
L0006B   L0006B L0006B PDF Download NATIONAL BGA 03+ 1 Prior to the onset of overvoltage clamping. For
L000S3B   L000S3B L000S3B PDF Download NS TSOP 05+ The TINIm400 must be seated correctly into the DS
L001A235   L001A235 L001A235 PDF Download INTEL BGA 98 1. Ground / thermal vias are critical for the pr
L0021   L0021 L0021 PDF Download Self-synchronization to main channel output Fre
L0028   L0028 L0028 PDF Download Leading edge blanking is also applied to the cur
L0042817C   L0042817C L0042817C PDF Download PHILIPS DIP-4 By using the control signal CS, SK and data input
L004A   L004A L004A PDF Download NSC Operation above maximum ratings may cause perman
L004B   L004B L004B PDF Download NS LLP8 03+ Bias Supply (Input): This input pin supplies pow
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