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The receiver accepts serial, CMI coded data, at 155.52Mbit/s or 139.264Mbit/s from either the CMI or the ECL inputs. In CMI mode, the inputs CMIINP and CMIINN receive the input signal from a coaxial cable that is transformer-coupled to the chip. The ECL pins should be left open. In ECL mode, the pins ECLINP and ECLINN receive the input signal.
  This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC.   Unused digital pins must be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused Analog I/O pins may be left open or terminated.
The I10509A-5 is a LPC Interface based highly integrated Super I/O. The I10509A-5 provides the most commonly used legacy Super I/O functionality. The device LPC interface complies with Inte l LPC Interfaces Specification Rev. 1.01. The I10509A-5 meets the Microsoft ® PC98/PC99/PC2001 System Design Guide requirements and is ACPI compliant.
Parr number/PDF Mfg Pack D/C Descrpion
I10003BI-J7   I10003BI-J7 I10003BI-J7 PDF Download   2.1.1 Specifications, standards, and hand
I1003AI-J7   I1003AI-J7 I1003AI-J7 PDF Download Notes:  1. Stresses greater than those lis
I102   I102 I102 PDF Download SOP 05+ The ispGDXVA can implement MUXes up to 16 bits w
I1020375NCED   I1020375NCED I1020375NCED PDF Download These parameters, although guaranteed over the r
I10387-02   I10387-02 I10387-02 PDF Download IMP The ADPCM serial input register is a 5-bit shift
I10387C   I10387C I10387C PDF Download AMI 97+ DIP-24P Write protection in a user defined section of me
I10388-04REVE   I10388-04REVE I10388-04REVE PDF Download PLCC IMP 03+ essors, but also eliminates bus contention in mu
I10398-04   I10398-04 I10398-04 PDF Download IMP STR73xF family combines the high performance ARM
I103A   I103A I103A PDF Download HYNIX SOP-3.9-8P 6+ • Double-data-rate architecture; two data t
I103H   I103H I103H PDF Download HYNIX SOP-3.9-8P 6+
I104024G128MFD   I104024G128MFD I104024G128MFD PDF Download intersil intersil dc85+ design. Field-proven, industry-standard 10BASE-T
I10412-01   I10412-01 I10412-01 PDF Download IMP SOP-28 98+ Hynix HYMD132725B(L)8-M/K/H/L series is unbuffere
I10412-02   I10412-02 I10412-02 PDF Download Dimensions - 2N6786       &nb
I10509A-5   I10509A-5 I10509A-5 PDF Download HARRIS DIP Further advantages can be seen in the introducti
I10588-01   I10588-01 I10588-01 PDF Download IMP 2007 • RKE - Remote Keyless Entry. • PKE
I10588-OD   I10588-OD I10588-OD PDF Download IMP PLCC 94+ Samsung makes no warranty, representation, or gu
I1059431160212   I1059431160212 I1059431160212 PDF Download vikay vikay dc98   The melting temperature of solder is high
I1093   I1093 I1093 PDF Download TMS320C62x, VelociTI, and C62x are trademarks of
I.BERMAN   I.BERMAN I.BERMAN PDF Download NOTE: ESD data available upon request. 1. 10H c
I.C-FA13842N   I.C-FA13842N I.C-FA13842N PDF Download Notes:  1. NC pins are not connected to th
I.R4296   I.R4296 I.R4296 PDF Download HARRIS SOP-8 99+ 15 hp (11 kW) power output 380 - 480V AC; 50/60H
I.T.I15-165   I.T.I15-165 I.T.I15-165 PDF Download Detailed Description Digitally Controlled Imped
I.T-1208   I.T-1208 I.T-1208 PDF Download • UltraFast Non Punch Through (NPT)  
I/3925A   I/3925A I/3925A PDF Download Low-power consumption modes (standby modes) Stop
I00-4637-01   I00-4637-01 I00-4637-01 PDF Download The TS7221 is amicropower comparator featuring
I00504   I00504 I00504 PDF Download ADJ: In the adjustable version, the user programs
I011   I011 I011 PDF Download The CY7C09159A and CY7C09169A are high-speed syn
I014723-876   I014723-876 I014723-876 PDF Download TEMIC This document contains proprietary information o
I014942PC84C   I014942PC84C I014942PC84C PDF Download NOTE: 1.Stresses greater than those listed unde
I0211A   I0211A I0211A PDF Download The q denotes the specifications which apply over
I024   I024 I024 PDF Download The bar antenna is the most critical device of t
I02J910930   I02J910930 I02J910930 PDF Download This family of four-, eight-, or sixteen-, diffe
I031538BLAM   I031538BLAM I031538BLAM PDF Download ALCATEL Receive Output. These ECL 100K outputs (+5V refe
I03602S04   I03602S04 I03602S04 PDF Download PHILIPS • Undervoltage Lockout • Low Profile
I044   I044 I044 PDF Download PRODUCTION DATA information is current as of publ
I045007AM   I045007AM I045007AM PDF Download ALCATEL/SMS PLCC-28P 00+ Ring Command - A low active TTL - Compatible log
I0458609AA   I0458609AA I0458609AA PDF Download CAUTION ESD (electrostatic discharge) sensitive
I0489C   I0489C I0489C PDF Download Notes: 1. All limits at operating temperature e
I04X125DC005   I04X125DC005 I04X125DC005 PDF Download N/A The 70C version utilizes an industry standard li
I07CZ.HZ   I07CZ.HZ I07CZ.HZ PDF Download 706 04+ INTERSIL
I0853008VSC   I0853008VSC I0853008VSC PDF Download ‡ Stresses beyond those listed under absol
I0858106CSA   I0858106CSA I0858106CSA PDF Download 1066 ZILOG 9900 Standard '245-Type Pinout Output Voltage Transla
I0861505PSC   I0861505PSC I0861505PSC PDF Download N/A DIP 07+   The term IAdj R2 represents the error add
I08689D   I08689D I08689D PDF Download The operating system can theoretically shut down
I087   I087 I087 PDF Download HEXFRED diodes are optimized to reduce losses an
I09296LFBZ   I09296LFBZ I09296LFBZ PDF Download TTL/CMOS Input Select Control. Selects either int
I096047   I096047 I096047 PDF Download Tiny SOT−353 and SOT−553 Packages Ex
I0I1/471-1   I0I1/471-1 I0I1/471-1 PDF Download AMIS TQFP-64P 04+ The FIFO has a combined Empty/Output Ready flag
I0I1471-1   I0I1471-1 I0I1471-1 PDF Download AMI DNL = 0.25 LSB INL = 0.5 LSB Single 3.3 V sup
I0MQ040TR   I0MQ040TR I0MQ040TR PDF Download   The deflection amplifier circuit of Figur
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