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Output voltage can be programmed using the on-chip DAC or an external precision reference. A two bit code programs the DAC reference to one of 4 possible values (0.6V, 0.9V, 1.2V and 1.5V). A unity gain, differential amplifier is provided for remote voltage sensing, compensating for any potential difference between remote and local grounds. The output voltage can also be offset through the use of single external resistor. An optional droop function is also implemented and can be disabled for applications having less stringent output voltage variation requirements or experiencing less severe step loads.
  The A3946 is designed specifically for applications that require high power unidirectional dc motors, three-phase brushless dc motors, or other inductive loads. The A3946 provides two high-current gate drive outputs that are capable of driving a wide range of power N-channel MOSFETs. The high-side gate driver switches an N-channel MOSFET that controls current to the load, while the low-side gate driver switches an N-channel MOSFET as a synchronous rectifier.
The AS6UA25616 is a low-power CMOS 4,194,304-bit Static Random Access Memory (SRAM) device organized as 262,144 words x 16 bits. It is designed for memory applications where slow data access, low power, and simple interfacing are desired.
Parr number/PDF Mfg Pack D/C Descrpion
8.601600MHZ   8.601600MHZ 8.601600MHZ PDF Download These Schottky diodes are specifically designed
8.60946E16   8.60946E16 8.60946E16 PDF Download Device programming occurs by executing the progra
8.60E16   8.60E16 8.60E16 PDF Download 1. Users should independently evaluate the suitab
8.60E261   8.60E261 8.60E261 PDF Download • Plastic package has Underwriters Laborat
8.60E299   8.60E299 8.60E299 PDF Download 20 S3 99+ The LTC®1928-5 is a doubler charge pump with
8.61E12   8.61E12 8.61E12 PDF Download Receiving noise at earphone weighted psophometri
8.61E13   8.61E13 8.61E13 PDF Download Cycle-by-cycle current limit provides protection
8.61E14   8.61E14 8.61E14 PDF Download • Easier assembler notation: register inte
8.61E16   8.61E16 8.61E16 PDF Download It includes Selectable A-law/u-law function, Inte
8.61E17   8.61E17 8.61E17 PDF Download This link must be in position "A" if e
8.61E18   8.61E18 8.61E18 PDF Download Synchronous Controller plus 3-LDO controllers Cu
8.62E13   8.62E13 8.62E13 PDF Download The UC3823A & B and the UC3825A & B fami
8.62E15   8.62E15 8.62E15 PDF Download Synchronous Controller plus 3-LDO controllers Cu
8.63E04   8.63E04 8.63E04 PDF Download Notes:  3. All input pulses are supplied b
8.65E05   8.65E05 8.65E05 PDF Download NO 40 2005 High sensitivity (C104dBm) 300MHz to 440MHz freq
8.664000MHZ   8.664000MHZ 8.664000MHZ PDF Download This document is a general product description an
8.664MHZ   8.664MHZ 8.664MHZ PDF Download Specifications Outline Dimensions Dimensions o
8.000000MHZ   8.000000MHZ 8.000000MHZ PDF Download   In the EDO page mode, read (data out) and
8.00000MHZ   8.00000MHZ 8.00000MHZ PDF Download This specification is intended to guarantee inter
8.0000M   8.0000M 8.0000M PDF Download NO 8. A/D sampling rate and any external power suppl
8.0000MHZ   8.0000MHZ 8.0000MHZ PDF Download Carrier Detect/Mute Indicator/Control. When the
8.000AT49   8.000AT49 8.000AT49 PDF Download 1.1 Greece has waited for long for character 10/
8.000M   8.000M 8.000M PDF Download ensure that modifications, if any, have been corr
8.000MHZ   8.000MHZ 8.000MHZ PDF Download The modem can connect to a host system serially
8.000MHZ(EX026B1C)   8.000MHZ(EX026B1C) 8.000MHZ(EX026B1C) PDF Download INVALID OP-CODE: If an invalid op-code is receive
8.000MHZ(EX029L)   8.000MHZ(EX029L) 8.000MHZ(EX029L) PDF Download drive. The test circuit is illustrated in figure
8.000MHZ-SCO57-503   8.000MHZ-SCO57-503 8.000MHZ-SCO57-503 PDF Download The SDA 9251 is a triple port 868 352 bit dynami
8.00E20   8.00E20 8.00E20 PDF Download   Integral Nonlinearity (INL)2   Offse
8.00E21   8.00E21 8.00E21 PDF Download   4.5.3 Coil selection for safe operating a
8.00MHZ   8.00MHZ 8.00MHZ PDF Download Hynix HYMD264M726A(L)8-J/M/K/H/L series incorpora
8.010116   8.010116 8.010116 PDF Download The 24XX32A supports a bidirectional, 2-wire bus
8.01609E12   8.01609E12 8.01609E12 PDF Download Digital-to-Analog Propagation Delay   to 9
8.02E12   8.02E12 8.02E12 PDF Download No warranty is made with respect to uses, operati
8.02E15   8.02E15 8.02E15 PDF Download Portable and Battery-Powered Equipment PDAs Cel
8.04E12   8.04E12 8.04E12 PDF Download   The K6T1008C2C families are fabricated by
8.04E15   8.04E15 8.04E15 PDF Download Synchronous Rectification for Higher Efficiency
8.064MHZ(SX-7)   8.064MHZ(SX-7) 8.064MHZ(SX-7) PDF Download
8.09E12   8.09E12 8.09E12 PDF Download The AHC126 devices are quadruple bus buffer gat
8.0MHZ   8.0MHZ 8.0MHZ PDF Download The HAL 5xx sensors are monolithic integrated ci
8.0NHA03T   8.0NHA03T 8.0NHA03T PDF Download The ACT16241 are 16-bit buffers or line drivers
8.18E14   8.18E14 8.18E14 PDF Download Collector-Base VoltageVCBO Collector-Emitter Vol
8.192   8.192 8.192 PDF Download AC bandwidth is independent of voltage gain Inh
8.192000MHZ   8.192000MHZ 8.192000MHZ PDF Download Low-power CMOS technology ORG pin to select wo
8.192000MHZATS-49/U   8.192000MHZATS-49/U 8.192000MHZATS-49/U PDF Download The APX9142 is an integrated Hall Effect Sensor I
8.19200MHZ   8.19200MHZ 8.19200MHZ PDF Download Responsible electronic component and equipment
8.1920M   8.1920M 8.1920M PDF Download The 8.1920M microcontroller embeds 136K bytes of
8.1920MHZ   8.1920MHZ 8.1920MHZ PDF Download SGUGCA SOP-6 01+ Family features include an 8-bit memory mapped a
8.19218KH   8.19218KH 8.19218KH PDF Download The FAN1951 offers a logic level enable pin and
8.19220CYH   8.19220CYH 8.19220CYH PDF Download Parameter Bias Offset Voltage(MODP) Bias offset
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