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NOTES: (1) With a balanced differential signal, the positive input is 180 out-of-phase with the negative input, therefore, the actual voltage swing about the common- mode voltage on each pin is 1.55V to achieve a total input range of 3.1V or 6.2Vp-p. (2) The A/D converter oversamples the receive signal and outputs data words at twice the symbol rate; the A/D converter conversion rate is called the Output Word Rate (OWR). (3) The digital low-pass filter that is part of the A/D converter can be programmed by the user for a 3dB frequency of 1/2 of the OWR or 1/4 of the OWR. (4) The internal line driver is designed for G.SHDSL. (5) An external driver (OPA2677) should be used for HDSL2 application. (6) The cutoff frequencies are user programmable. (7) Uncancelled echo is the sum of all noise and distortion errors for both the transmit and receive channels. (8) For a random sequence of the symbol, using an internal driver providing 14.5dBm power to the line for G.SHDSL. (9) For a random sequence while driving an external line driver (OPA2677) for HDSL2. (10) Functionality only guaranteed over temperature range.
The loop is stabilized by a PID compensation amplifier with high stability and low noise. The compensation network can be adjusted by the user to optimize temperature settling time. The component values for this network can be calculated based on the thermal transfer function of the laser diode or obtained from the look-up table given in the applications notes.
Figure 2 shows a typical application circuit for the 5.84.5-150 MMIC. The device is internally matched to 50 Ω, and therefore does not need any external matching. The value of the input and output DC blocking capacitors C1, C2 should be not more than 100 pF for applications above 100 MHz. Their values can be used to fine tune the input and output impedance. However, when the device is operated below 100 MHz, the capacitor value should be increased.
Parr number/PDF Mfg Pack D/C Descrpion
5.80103E11   5.80103E11 5.80103E11 PDF Download Receiver Active: RxA is asserted when the first d
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5.04E11   5.04E11 5.04E11 PDF Download   Multiple APC priority levels available to
5.05E16   5.05E16 5.05E16 PDF Download A refresh operation must be performed at least o
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5.09017E11   5.09017E11 5.09017E11 PDF Download   The PT4140 power modules are a series of
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5.101E11   5.101E11 5.101E11 PDF Download The LTC2439-1 accepts any external differential r
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